Automatic gain control circuit and receiver device having the automatic gain control circuit, and automatic gain control method

ABSTRACT

An automatic gain control circuit optimizes a follow-up performance of an automatic gain control loop to thus assure a good receiving operation. A generation timing or a generation period of a control signal GC is decided in response to a lapsed time in operation of the receiver device. For a predetermined rise period from a non-operated state to the steady operation state when a power supply is shifted from its OFF state to its ON state (power supply is turned ON) or at the time of intermittent receiving operation, the generation period of the control signal GC is set shorter than the generation period in a steady operation state so as to accelerate the response characteristic of the automatic gain control gain rather than the steady operation condition, and then switched to the generation period in the steady operation state after a predetermined time.

BACKGROUND OF THE INVENTION

The present invention relates to an automatic gain control circuit whichis able to assure a good receiving operation by optimizing a follow-upperformance of an automatic gain control loop, a receiver device withthe automatic gain control circuit, an automatic gain control method inthe receiver device, and a recording medium for recording a program forcarrying out the automatic gain control method.

As the automatic gain control circuit in the receiver device in theprior art, the circuit as shown in FIG. 13 has been well known, forexample. In FIG. 13, the automatic gain control circuit in the prior artis constructed to comprises a gain variable amplifier 11, a demodulatorportion 12, an A/D converter 13, a level detector 14, an averagingportion 15, an adder 16 for calculating a difference-in-converged value,a multiplier 17 for controlling a loop gain, an adder 18 in anintegrator circuit portion, a latch circuit 19 in an integrator circuitportion, an arithmetic portion 20, and a D/A converter 21.

In the automatic gain control circuit in the prior art, when a receivingsignal Ri is input, such receiving signal input Ri is amplified by thegain variable amplifier 11, then demodulated by the demodulator portion12, and then converted into a digital value by the A/D converter 13 tobe output as a demodulated output Rd. A part of the demodulated outputRd is level-detected by the level detector 14 and then send out to anautomatic gain control loop.

The level-detected data are averaged for a predetermined time by theaveraging portion 15. Then, a difference between an output of theaveraging portion 15 and a constant target level A is calculated by thedifference-in-converged value calculating adder 16 so as to converge theoutput to the input for the A/D converter 13, and then multiplied by aloop gain control value B in the automatic gain control circuit by theloop gain controlling multiplier 17. An output of the multiplier 17 isinput into an integrator circuit portion, which consists of the adder 18and the latch circuit 19, as an amount of change from the precedingdata, and then integral data are latched by the latch circuit 19 at atiming of a latch timing control value C4. The integral data from theintegrator circuit portion are converted into data equivalent to thecontrol voltage for the gain variable amplifier 11 by the arithmeticportion 20, then converted into an analogue voltage by the D/A converter21, and then fed back to the gain variable amplifier 11 as the controlvoltage.

However, in the above automatic gain control circuit in the prior art, ageneration or update period of the control signal which is fed back tothe gain variable amplifier 11 is fixed. For this reason, when variationin level of the receiving signal Ri is largely caused at the time of aturn-ON operation of a power supply of the automatic gain controlcircuit, an intermittent receiving operation of the receiver devicewhich includes the automatic gain control circuit, a receiving operationin the fading condition, or the like, a follow-up performance of theautomatic gain control loop is degraded in the event that the generationor update period of the control signal of the automatic gain controlloop is set and fixed as a relatively large value, conversely thefollow-up performance of the automatic gain control loop is made tooquick so that there is a possibility to cause harmful influences such asgeneration of an unstable state, generation of oscillation, etc. in theevent that the generation or update period of the control signal of theautomatic gain control loop is set and fixed as a relatively smallvalue.

SUMMARY OF THE INVENTION

The present invention has been made in view of the above circumstancesin the prior art, and it is an object of the present invention toprovide an automatic gain control circuit which can optimize a follow-upperformance of an automatic gain control loop to thus assure a goodreceiving operation by optimizing a generation timing or a generationperiod of a control signal for the automatic gain control loop even inthe case where large variation in a receiving signal level is expectedat the time of a turn-ON operation of a power supply, an intermittentreceiving operation of a receiver device, a receiving operation in thefading condition, or the like, or the case where small variation in thereceiving signal level is caused because the electric field condition isstabilized, a receiver device with such automatic gain control circuit,an automatic gain control method in a receiver device, and a recordingmedium.

Also, it is another object of the present invention to provide anautomatic gain control method in a receiver device, which utilizes a DSP(digital signal processor) in an automatic gain control loop and whichcan optimize a follow-up performance of the automatic gain control loopto thus assure a good receiving operation even in the case whereautomatic gain control of a receiver system is carried out according toa software program, and a recording medium.

In order to achieve the above objects, there is provided an automaticgain control circuit according to first aspect of the present inventionincluding a gain variable amplifier which controls an amplitude of areceiving signal based on a control signal, the circuit comprising acontrol signal generating means for level-detecting the receiving signaland then generating a feedback signal as the control signal for the gainvariable amplifier, and a controlling means for deciding a generationtiming of the control signal or a generation period of the controlsignal in response to a predetermined physical quantity and controllingthe control signal generating means.

Also, in the automatic gain control circuit, the controlling means mayinclude a look-up table which uses address information as thepredetermined physical quantity and holds information of the generationtiming of the control signal or the generation period of the controlsignal in response to the address information.

Also, in the automatic gain control circuit, the controlling means maydecide the generation timing of the control signal or the generationperiod of the control signal using a lapsed time in operation of theautomatic gain control circuit as the predetermined physical quantity.

Also, in the automatic gain control circuit, the controlling means mayset the generation period of the control signal shorter than thegeneration period in a steady operation state, for a predetermined risetime from a non-operated state to the steady operation state when apower supply is turned on.

Also, in the automatic gain control circuit, the controlling means mayset the generation period of the control signal shorter than thegeneration period in a steady operation state, for a predetermined risetime from a non-operated state to the steady operation state when anintermittent receiving operation is carried out.

Also, preferably, the automatic gain control circuit further comprises adetection output change amount detecting means for detecting an amountof change in a detected output of the receiving signal, wherein thecontrolling means decides the generation timing of the control signal orthe generation period of the control signal using an amount of change inthe detected output as the predetermined physical quantity.

Also, preferably, an automatic gain, control circuit further comprises afading pitch detecting means for detecting a fading pitch of thereceiving signal, wherein the controlling means decides the generationtiming of the control signal or the generation period of the controlsignal using the fading pitch as the predetermined physical quantity.

Also, a receiver device according to the present invention comprises theautomatic gain control circuit as mentioned above.

Also, an automatic gain control method according to second aspect of thepresent in a receiver device including a gain variable amplifier whichcontrols an amplitude of a receiving signal based on a control signal,comprises a control signal generating step of level-detecting thereceiving signal and then generating a feedback signal as the controlsignal for the gain variable amplifier, and a controlling step ofdeciding a generation timing of the control signal or a generationperiod of the control signal in response to a predetermined physicalquantity.

Also, in an automatic gain control method, the controlling step maydecide the generation timing of the control signal or the generationperiod of the control signal using a lapsed time in operation of thereceiver device as the predetermined physical quantity.

Also, in an automatic gain control method, the controlling step may setthe generation period of the control signal shorter than the generationperiod in a steady operation state, for a predetermined rise time from anon-operated state to the steady operation state when a power supply isturned on.

Also, in an automatic gain control method, the controlling step may setthe generation period of the control signal shorter than the generationperiod in a steady operation state, for a predetermined rise time from anon-operated state to the steady operation state when an intermittentreceiving operation is carried out.

Also, preferably, an automatic gain control method further comprises adetected output change amount detecting step of detecting an amount ofchange in a detected output of the receiving signal, wherein thecontrolling step decides the generation timing of the control signal orthe generation period of the control signal using an amount of change inthe detected output as the predetermined physical quantity.

Also, preferably, an automatic gain control method further comprises afading pitch detecting step of detecting a fading pitch of the receivingsignal; wherein the controlling step decides the generation timing ofthe control signal or the generation period of the control signal usingthe fading pitch as the predetermined physical quantity.

Further, a computer-readable recording medium according to the presentinvention records the automatic gain control method mentioned above as aprogram to be executed by a computer.

In the automatic gain control circuit according to the presentinvention, when the receiving signal is level-detected by the controlsignal generating means (control signal generating step) to generate thefeedback signal as the control signal for the gain variable amplifier,the generation timing of the control signal or the generation period ofthe control signal is decided by the controlling means (controllingstep) in response to the predetermined physical quantity.

Accordingly, under various situations such as the case where largevariation in the receiving signal level is expected, the case wheresmall variation in the receiving signal level is caused because theelectric field condition is stabilized, or the like, the generationtiming or the generation period of the control signal for the automaticgain control loop can be decided by setting the physical quantity torespond to various conditions.

As a result, the follow-up performance of the automatic gain controlloop can be optimized in various situations, and thus the good receivingcharacteristic can be achieved.

Particularly, in the automatic gain control circuit while using addressinformation as the predetermined physical quantity, information of thegeneration timing of the control signal or the generation period of thecontrol signal are held in response to the address information in thelook-up table, and then the generation timing or the generation periodof the control signal for the gain variable amplifier is decided inanswer to the predetermined physical quantity by referring to thelook-up table.

Accordingly, under various situations such as the case where largevariation in the receiving signal level is expected at the time of theturn-ON operation of the power supply, the intermittent receivingoperation of the receiver device, the receiving operation in the fadingcondition, or the like, or the case where small variation in thereceiving signal level is caused because the electric field condition isstabilized, the predetermined physical quantity can be set finely byreferring to the look-up table upon optimization of the generationtiming or the generation period of the control signal for the automaticgain control loop. Therefore, the follow-up performance of the automaticgain control loop can be optimized under various conditions, and thusthe good receiving characteristic can be achieved correspondingly. Also,update of the method of generating the generation timing or thegeneration period of the control signal and also the data stored in thetable can be performed simply by exchanging the look-up table.

Also, in the automatic gain control circuit according to the presentinvention, the generation timing of the control signal or the generationperiod of the control signal is decided by the controlling means(controlling step), while using the lapsed time in operation of theautomatic gain control circuit or the receiver device including theautomatic gain control circuit as the predetermined physical quantity.

Also, particularly, in the automatic gain control circuit, thegeneration period of the control signal is set shorter than thegeneration period in the steady operation state by the controlling means(controlling step), for a predetermined rise time from the non-operatedstate to the steady operation state when the power supply is turned on.

In this fashion, the generation timing or the generation period of thecontrol signal can be decided in response to the lapsed time inoperation of the automatic gain control circuit or the receiving devicewhich is constructed to comprise the automatic gain control circuit. Fora predetermined rise period from the non-operated state to the steadyoperation state when the power supply is turned ON, the generationperiod of the control signal can be set shorter than the generationperiod in the steady operation state so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state. Therefore, even in the case where largevariation in the receiving signal level is expected at the time of thepower supply ON, the generation timing or the generation period of thecontrol signal for the automatic gain control loop can be optimized andalso the follow-up performance of the automatic gain control loop can beoptimized to thus assure the good receiving characteristic.

Also, particularly, in the automatic gain control circuit according tothe present invention, the controlling means (the controlling step) setsthe generation period of the control signal shorter than the generationperiod in a steady operation state, for a predetermined rise time fromthe non-operated state to the steady operation state when anintermittent receiving operation is carried out.

In this way, the generation timing or the generation period of thecontrol signal can be decided in response to the lapsed time inoperation of the automatic gain control circuit or the receiving devicewhich is constructed to comprise the automatic gain control circuit. Fora predetermined rise period from the non-operated state to the steadyoperation state when the receiver device carries out the intermittentreceiving operation, the generation period of the control signal can beset shorter than the generation period in the steady operation state soas to accelerate the response characteristic of the automatic gaincontrol loop rather than that in the steady operation state.

Therefore, even in the case where large variation in the receivingsignal level is expected at the time of the intermittent receivingoperation of the receiver device, the generation timing or thegeneration period of the control signal for the automatic gain controlloop can be optimized and also the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

Also, in the automatic gain control circuit according to the presentinvention, the controlling means (controlling step) decides thegeneration timing of the control signal or the generation period of thecontrol signal using an amount of change in the detected output of thereceiving signal, which is detected by the detected output change amountdetecting means (detected output change amount detecting step), as thepredetermined physical quantity.

In this manner, the generation timing or the generation period of thecontrol signal can be decided in response to an amount of change in thedetected output of the detected receiving signal.

Therefore, under various situations such as the case where largevariation in the receiving signal level is expected, the case wheresmall variation in the receiving signal level is caused because thecondition of the electric field is stabilized, or the like, thegeneration timing or the generation period of the control signal for theautomatic gain control loop can be optimized finely and also thefollow-up performance of the automatic gain control loop can beoptimized to thus assure the good receiving characteristic.

Furthermore, in the automatic gain control circuit according the presentinvention, the controlling means (controlling step) decides thegeneration timing or the generation period of the control signal usingthe fading pitch of the receiving signal, which is detected by thefading pitch detecting means (fading pitch detecting step), as thepredetermined physical quantity.

In this manner, the generation timing or the generation period of thecontrol signal can be decided in response to the fading pitch of thedetected receiving signal. Therefore, even in the case where largevariation in the receiving signal level is expected in receiving thereceiving signal in the fading circumstance, the generation timing orthe generation period of the control signal for the automatic gaincontrol loop can be optimized and the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a view showing a configuration of an automatic gain controlcircuit according to a first embodiment of the present invention;

FIGS. 2A and 2B are views showing a follow-up performance of anautomatic gain control loop in a rise condition of a receiver devicefrom a non-operated state (initial state) to a steady operation statewhen a power supply of the receiver device is turned ON, FIG. 2A showsthe case of the automatic gain control circuit according to the firstembodiment, and FIG. 2B shows the case in the prior art;

FIG. 3 is a flowchart showing a method of deciding a generation periodof a control signal, which is executed by a control portion in the firstembodiment;

FIG. 4 is a flowchart showing procedures in a software program(automatic gain control method) which is executed on a DSP in a secondvariation;

FIGS. 5A and 5B are views showing a follow-up performance of anautomatic gain control loop in a rise condition of a receiver devicefrom the non-operated state (initial state) to the steady operationstate when the receiver device carries out intermittent reception, FIG.5A shows the case of the automatic gain control circuit according to thesecond embodiment, and FIG. 5B shows the case in the prior art;

FIG. 6 is a flowchart showing a method of deciding a generation periodof a control signal, which is executed by a control portion in a secondembodiment;

FIG. 7 is a view showing a configuration of an automatic gain controlcircuit according to a third embodiment of the present invention;

FIGS. 8A and 8B are views showing a follow-up performance of anautomatic gain control loop of a receiver device, FIG. 8A shows the caseof the automatic gain control circuit according to the third embodiment,and FIG. 8B shows the case in the prior art;

FIG. 9 is a flowchart showing a method of deciding an integration period(integration timing) in the third embodiment;

FIG. 10 is a view showing a configuration of an automatic gain controlcircuit according to a fourth embodiment of the present invention;

FIG. 11 is a flowchart showing a method of deciding an integrationperiod (integration timing) in the fourth embodiment;

FIG. 12 is a view showing a configuration of a receiver device includingan automatic gain control circuit according to a fifth embodiment of thepresent invention; and

FIG. 13 is a view showing a configuration of an automatic gain controlcircuit in a receiver device in the prior art.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of an automatic gain control circuit, a receiver device withsuch automatic gain control circuit, an automatic gain control method ina receiver device, and a recording medium according to the presentinvention will be explained in detail in the order from a firstembodiment to a fifth embodiment with reference to the accompanyingdrawings hereinafter. In this case, in the following explanation ofrespective embodiments, the automatic gain control circuit, the receiverdevice with the automatic gain control circuit, and the automatic gaincontrol method in the receiver device according to the present inventionwill be explained in detail, but it should be interpreted that, sincethe recording medium is used to record a program for carrying out theautomatic gain control method, explanation of the recording mediumaccording to the present invention is contained in the explanation ofthe automatic gain control method.

First Embodiment

FIG. 1 is a view showing a configuration of an automatic gain controlcircuit according to a first embodiment of the present invention. Theautomatic gain control method according to the present invention isapplied to the automatic gain control circuit.

In FIG. 1, like reference symbols are affixed to the same or similarparts as those in FIG. 13 (the prior art).

In FIG. 1, the automatic gain control circuit according to the presentinvention is constructed to comprises a gain variable amplifier 11, ademodulator portion 12, an A/D converter 13, a level detector 14, anaveraging portion 15, a difference-in-converged value calculating adder16, a loop gain controlling multiplier 17, an adder 18 in an integratorcircuit portion, a latch circuit 19 in an integrator circuit portion, anarithmetic portion 20, a D/A converter 21, and a control portion 25.

The gain variable amplifier 11, the demodulator portion 12, and the A/Dconverter 13 construct a receiver system which receives a receivingsignal input Ri and then outputs a demodulated output Rd. The leveldetector 14, the averaging portion 15, the difference-in-converged valuecalculating adder 16, the loop gain controlling multiplier 17, the adder18 in an integrator circuit portion, the latch circuit 19 in anintegrator circuit portion, the arithmetic portion 20, and the D/Aconverter 21 construct an automatic gain control loop. In this case, theautomatic gain control loop corresponds to a control signal generatingmeans set forth in claims. Also, the control portion 25 can beimplemented by a processing means such as a microprocessor, etc., andcorresponds to a controlling means set forth in claims.

First, in the receiver system, the gain variable amplifier 11 can changeits gain in response to a potential of the control signal GC which isgenerated by the automatic gain control loop. The demodulator portion 12demodulates the amplified receiving signal (Ri), and the A/D converter13 converts the demodulated signal into a digital signal and thenoutputs a demodulated output Rd.

Also, in the automatic gain control loop, a signal level of thedemodulated output Rd is first detected by the level detector 14. Then,the detected signal level is averaged for a predetermined time by theaveraging portion 15. Then, a difference between output data from theaveraging portion 15 and a converged level target value A of the inputfor the A/D converter 13 is calculated by the difference in convergedvalue calculating adder 16. Then, the loop gain control value B ismultiplied by the loop gain controlling multiplier 17 to control theloop gain in the automatic gain control loop. The addition result islatched by the adder 18 and the latch circuit 19 in the integratorcircuit portion at a timing based on a latch timing control signal C1supplied from the control portion 25 to execute the data integration.

In addition, control voltage data for the gain variable amplifier 11 aregenerated from the integral data by the arithmetic portion 20. Thiscontrol voltage data are then converted into the analogue value by theD/A converter 21, and then supplied to the gain variable amplifier 11 inthe receiver system as the control signal GC which has a potentialdefined by the automatic gain control loop.

Here, an approach executed by the control portion 25 to decide ageneration timing or generation period of the control signal GC will beexplained hereunder. As mentioned above, the control portion 25 outputsthe latch timing control signal C1 to control a timing at which theoutput of the adder 18 is latched by the latch circuit 19 in theintegrator circuit portion, and the preceding loop gain data in theautomatic gain control loop is held in the latch circuit 19. Since theaddition result to which an amount of change in the loop gain data isadded by the adder 18 is latched by a trigger of the latch timingcontrol signal C1, the generation timing of the control signal GC can bedefined by the latch timing control signal C1. As a result, a period ofthe trigger of the latch timing control signal C1 corresponds to thegeneration timing of the control signal GC.

The automatic gain control circuit according to the first embodiment isable to decide the generation timing or the generation period of thecontrol signal GC in response to a lapsed time after the operation ofthe automatic gain control circuit or the receiving device which isconstructed to comprise the automatic gain control circuit has beenstarted. More particularly, the automatic gain control circuit accordingto the first embodiment is characterized in that, for a predeterminedrise period from a non-operated state to a steady operation state whenthe power supply of the receiver device is shifted from its OFF state toits ON state (when the power supply is turned ON), the generation periodof the control signal GC can be set shorter than the generation periodin the steady operation state so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state, and then the shorter generation period canbe switched to the generation period in the steady operation state afterthe predetermined time.

The method of deciding the generation period of the control signal GC toachieve such feature will be explained with reference to FIG. 2 and FIG.3 hereunder. FIG. 2 is a view showing a follow-up performance of anautomatic gain control loop in a rise condition of a receiver devicefrom a non-operated state (initial state) to a steady operation statewhen a power supply of the receiver device is turned ON. FIG. 2A showsthe case of the automatic gain control circuit according to the firstembodiment, and FIG. 2B shows the case in the prior art. FIG. 3 is aflowchart showing the method of deciding the generation period of thecontrol signal GC executed by the control portion 25.

To begin with, the problems of the automatic gain control circuit in theprior art shown in FIG. 2B will be explained hereunder. Normally, if thefollow-up performance of the automatic gain control loop relative to thelevel variation is taken into consideration, the generation period T1[s] of the control signal GC of the automatic gain control loop is setsmaller. In such case, since the automatic gain control loop follows anenvelope of the received modulated wave to cause deterioration of thereceiving characteristic, to become unstable against the sudden levelvariation, to cause bad effects such as the oscillation, etc., or thelike, there is limitations on such smaller setting of the generationperiod. Accordingly, in the prior art, even if the large level variationis caused, for example, at the time of the rise period from thenon-operated state to the steady operation state when the power supplyof the receiver device is shifted from its OFF state to its ON state,the generation period of the control signal GC of the automatic gaincontrol loop is set to T1 [s] (e.g., 5 [ms]) which is equal to that inthe steady operation state. Therefore, the follow-up performance of theautomatic gain control loop is deteriorated in some cases.

On the contrary, in the automatic gain control circuit according to thefirst embodiment, as shown in FIG. 2A, in order to overcome the aboveproblems in the prior art, the generation period of the control signalGC is set to the generation period T2 [s] (e.g., 1 [ms]) of the controlsignal GC, which is shorter than the generation period T1 [s] (e.g., 5[ms]) of the control signal GC in the steady operation state, at thetime of the rise operation of the receiving device such that theresponse characteristic of the automatic gain control loop can beaccelerated rather than the steady operation state to improve thefollow-up performance. After this, the generation period of the controlsignal GC is switched to the generation period T1 [s] of the controlsignal GC in the steady operation state at a lapsed time T3 [s] at whichcompletion of the rise operation of the detected level of a receivedelectric field is assumed.

In other words, in a flowchart shown in FIG. 3, in step S303, thecontrol portion 25 sets the generation period of the control signal GCto T2 [s], which is shorter than that in the steady operation state,from the power supply ON to the lapsed time T3 [s]. In step S302, afterthe lapsed time T3 has lapsed from the power supply ON, the controlportion 25 sets the generation period of the control signal GC to T1 [s]which must be set in the steady operation state. Then, the trigger ofthe latch timing control signal C1 is generated based on the setgeneration period. In this case, counting of the time from the powersupply ON is made by a software timer in the microprocessor, and thesoftware timer is reset at the time of the power supply ON.

In this manner, because the generation period T2 [s] of the controlsignal GC of the automatic gain control loop is set shorter than thegeneration period T1 [s] in the steady operation state at the time ofthe rise period from the non-operated state to the steady operationstate when the power supply of the receiver device is shifted from itsOFF state to its ON state, the follow-up performance of the automaticgain control loop at the time of the rise operation and the pull-in ofthe automatic gain control loop can be improved.

Next, operations of the receiver system and the automatic gain controlloop in the automatic gain control circuit according to the firstembodiment will be explained with reference to FIG. 1 hereunder. First,when a receiving signal input Ri is input, such receiving signal inputRi is amplified by the gain variable amplifier 11, then demodulated bythe demodulator portion 12, and then converted into a digital value bythe A/D converter 13 to be output as a demodulated output Rd. Here, apart of the demodulated output Rd as an output of the receiver system islevel-detected by the level detector 14 and then send out to theautomatic gain control loop.

Then, in the automatic gain control loop, the data which arelevel-detected by the level detector 14 are subjected to the averagingprocess by the averaging portion 15 for a predetermined time. Forexample, an interval average of the data is calculated for 0.625 [ms]and then latched, and then a moving average of the data is calculatedsubsequently for the time which is an integral multiple of 0.625 [ms].Then, a difference between an output of the averaging portion 15 and aconstant target level (e.g., 0.5 [Vp-p]) of the target value A iscalculated by the adder 16 so as to converge such output into the inputfor the A/D converter 13. Then, an output of the adder 16 is multipliedby the loop gain control value B by the multiplier 17 to control theloop gain in the automatic gain control loop.

Then, an output of the multiplier 17 is input into an integrator circuitportion, which consists of the adder 18 and the latch circuit 19, as anamount of change from the preceding loop gain data which are output fromthe automatic gain control loop. Then, such amount of change suppliedfrom the multiplier 17 is added to the preceding loop gain data, whichare latched in the latch circuit 19, by the adder 18. Then, the additionresult is latched and integrated by the latch circuit 19 at a trigger ofthe latch timing control signal C1 which is generated based on thegeneration period of the control signal GC which is decided by thecontrol portion 25.

The integral data integrated by the integrator circuit portion areconverted into data which are equivalent to the control voltage for thegain variable amplifier 11 by the arithmetic portion 20. Then, thearithmetic result is converted into an analogue voltage by the D/Aconverter 21, and then fed back as the control voltage for the gainvariable amplifier 11 based on the data.

As the parameters of the interval average and the moving average of thedata in the averaging portion 15, the data calculated from thearithmetic process by the DSP, etc. may be employed, otherwise the dataobtained by referring to a numerical value translation table as alook-up table which is stored in the ROM, etc. may be employed. Inaddition, concerning other parameters, as the target value A added bythe adder 16 and the loop gain control value B multiplied by themultiplier 17, similarly the data calculated from the arithmetic processby the DSP, etc. may be employed, otherwise the data obtained byreferring to a numerical value translation table as a look-up tablewhich is stored in the ROM, etc. may be employed.

In turn, as a first variation of the automatic gain control circuitaccording to the first embodiment, a variation in which a numericalvalue translation table (look-up table) is employed as the controlportion 25 will be explained hereunder. In this case, the controlportion 25 is constructed, for example, by incorporating a timer circuit(counter) which counts a time lapsed from the power supply ON and amemory such as the ROM, etc. in which the numerical value translationtable is stored into the microprocessor. The timer circuit is reset atthe time of the power supply ON, and outputs a lapsed time from thepower supply ON as an address to the memory. The memory holds thegeneration period of the control signal GC in the address (lapsed time),so that the generation period of the control signal GC which correspondsto the operation lapsed time of the automatic gain control circuit issupplied to the microprocessor. Then, the trigger of the latch timingcontrol signal C1 is generated based on the generation period of thecontrol signal GC by the microprocessor.

In the event that the generation period is set to have the above processcontents shown in FIG. 3, if the timer circuit counts the lapsed time T3to then output as the address the signal indicating whether or not thetime T3 has passed, only the data of the generation periods T1, T2 maybe held in the memory. In other words, if the addressing for the memoryis designed in another way, an amount of data of the generation periodwhich is held in the memory can be reduced. If such numerical valuetranslation table (look-up table) is employed, the method of generatingthe generation period of the control signal GC and the generation perioddata per se can be changed simply by exchanging the ROM, etc.

Next, as a second variation of the automatic gain control circuitaccording to the first embodiment, a variation in which the digitalsignal processor (DSP) is employed in the automatic gain control loopwill be explained hereunder. In this case, for example, the leveldetector 14, the averaging portion 15, the difference-in-converged valuecalculating adder 16, the loop gain controlling multiplier 17, the adder18 in an integrator circuit portion, the latch circuit 19 in anintegrator circuit portion, the arithmetic portion 20, the D/A converter21, and the control portion 25 can be implemented by the DSP. Theprocedures in a software program (automatic gain control method) whichis executed on the DSP at this time will be explained with reference toa flowchart shown in FIG. 4. Processes shown in the flowchart in FIG. 4correspond to a control signal generating step set forth in claims, andprocesses shown in the flowchart in FIG. 3 correspond to a control step.

First, in step S401, when the receiving signal Ri is input into thereceiver system, the input signal is amplified by the gain variableamplifier 11, then demodulated by the demodulator portion 12, thenconverted into the digital value by the A/D converter 13, and thenoutput as the demodulated signal Rd. Here the DSP receives a part of thedemodulated signal Rd from the receiver system.

In step S402, the level detection of the data is executed. In step S403,the level-detected data are then subjected to the averaging process fora certain time. For example, the interval average of the data iscalculated for 0.625 [ms] and then latched, and then the moving averageof the data is calculated thereafter for the time which is an integralmultiple of 0.625 [ms]. In step S404, the difference between the outputof the averaging portion 15 and the constant target level (e.g., 0.5[Vp-p]) of the target value A is then calculated so as to converge theoutput into the input for the A/D converter 13. In step S405, the outputof the adder 16 is then multiplied by the loop gain, control value B tocontrol the loop gain in the automatic gain control loop. In step S406,the multiplied result in step S405 is then added (integrated) topreceding control data as the amount of change from the loop gain databeing output from the automatic gain control loop.

In step S407, the data which have been integrated in step S406 areconvert into data (analogue value) corresponding to the control voltagefor the gain variable amplifier 11, and then fed back to the gainvariable amplifier 11 as the control voltage. In step S408, the gaincontrol of the gain variable amplifier 11 is carried out.

In this case, the parameters of the interval average and the movingaverage, the target value A in step S404, and the loop gain controlvalue B in step S405 are similar to those employed in the aboveautomatic gain control circuit. Also, the processes in the automaticgain control circuit according to the above first embodiment (see theflowchart in FIG. 3) are similarly performed at the addition (integral)timing of the control data in step S406.

In other words, the generation period of the control signal GC is set tothe shorter generation period T2 [s] at the time of the rise operationof the receiving device such that the response characteristic of theautomatic gain control loop can be accelerated rather than the steadyoperation state to improve the follow-up performance, and then thegeneration period of the control signal GC is switched to the generationperiod T1 [s] in the steady operation state after the time T3 [s] atwhich completion of the rise operation of the detected level of thereceived electric field is assumed has lapsed.

As described above, according to the first embodiment and the first andsecond variations of the first embodiment, the generation timing or thegeneration period of the control signal GC can be decided in response tothe lapsed time in operation of the automatic gain control circuit orthe receiving device which is constructed to comprise the automatic gaincontrol circuit. More specifically, for a predetermined rise period fromthe non-operated state to the steady operation state when the powersupply of the receiver device is shifted from its OFF state to its ONstate (when the power supply is turned ON), the generation period T2 [s]of the control signal GC can be set shorter than the generation periodT1 [s] in the steady operation state so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state, and then such shorter generation period canbe switched to the generation period in the steady operation state afterthe predetermined time T3 [s]. Therefore, even in the case where largevariation in the receiving signal level is expected at the time of theturn-ON operation of the power supply, or the case where small variationin the receiving signal level is caused because the condition of theelectric field is stabilized, the generation timing or the generationperiod of the control signal for the automatic gain control loop can beoptimized and the follow-up performance of the automatic gain controlloop can be optimized to thus assure the good receiving characteristic.

Second Embodiment

Next, an automatic gain control circuit and an automatic gain controlmethod employed in the receiver device including the automatic gaincontrol circuit according to the second embodiment of the presentinvention will be explained hereunder. A circuit configuration of theautomatic gain control circuit according to the second embodiment issimilar to that in the first embodiment (FIG. 1), but an approach fordeciding the generation timing or the generation period of the controlsignal GC in the control portion 25 is different.

In FIG. 1, like the first embodiment, the control portion 25 outputs thelatch timing control signal C1 to control the timing at which an outputof the adder 18 in the integrator circuit portion is latched by thelatch circuit 19. The preceding loop gain data in the automatic gaincontrol loop are held in the latch circuit 19, and the result which isobtained by adding an amount of change in the loop gain data by theadder 18 is latched by the trigger of the latch timing control signalC1. Therefore, the latch timing control signal C1 can define thegeneration timing of the control signal GC, and the trigger period ofthe latch timing control signal C1 coincides with the generation periodof the control signal GC.

The automatic gain control circuit according to the second embodiment isable to decide the generation timing or the generation period of thecontrol signal GC in response to the lapsed time after the operation ofthe automatic gain control circuit or the receiving device which isconstructed to comprise the automatic gain control circuit has beenstarted. More particularly, the automatic gain control circuit accordingto the second embodiment is characterized in that, for a predeterminedrise period from the non-operated state to the steady operation statewhen the receiver device carries out its intermittent receivingoperation, the generation period of the control signal GC can be setshorter than the generation period in the steady operation state so asto accelerate the response characteristic of the automatic gain controlloop rather than that in the steady operation state, and then suchshorter generation period can be switched to the generation period inthe steady operation state after the predetermined time.

A method of deciding the generation period of the control signal GCwhich is characterized as above will be explained with reference to FIG.5 and FIG. 6 hereunder. FIG. 5 is a view showing the follow-upperformance of the automatic gain control loop in the rise condition ofthe receiver device from the non-operated state (initial state) to thesteady operation state when the receiver device carries out intermittentreceiving operation.

FIG. 5A shows the case of the automatic gain control circuit accordingto the second embodiment, and FIG. 5B shows the case of the automaticgain control circuit in the prior art. FIG. 6 is a flowchart showing themethod of deciding the generation period of the control signal GC, whichis executed by the control portion 25.

First, the problems in the automatic gain control circuit in the priorart shown in FIG. 5B will be explained. Normally, if the follow-upperformance of the automatic gain control loop relative to the levelvariation is taken into consideration, the generation period T4 [s] ofthe control signal GC of the automatic gain control loop is set smaller.In such case, since the automatic gain control loop follows the envelopeof the received modulated wave to thus cause deterioration of thereceiving characteristic, to become unstable against the sudden levelvariation, to cause bad effects such as the oscillation, etc., or thelike, limitations are imposed on such smaller setting of the generationperiod. Accordingly, in the prior art, even if the large level variationis caused, for example, at the time of the rise period from thenon-operated state to the steady operation state when the receiverdevice carries out its intermittent receiving operation, the generationperiod of the control signal GC of the automatic gain control loop isset to T4 [s] (e.g., 5 [ms]) which is equal to that in the steadyoperation state. Therefore, the follow-up performance of the automaticgain control loop is deteriorated in some cases.

In contrast, in the automatic gain control circuit according to thesecond embodiment, as shown in FIG. 5A, in order to overcome the aboveproblems in the prior art, the generation period of the control signalGC is set to the generation period T5 [s] (e.g., 1 [ms]) of the controlsignal GC, which is shorter than the generation period T4 [s] (e.g., 5[ms]) of the control signal GC in the steady operation state, in therise period of the intermittent receiving operation such that theresponse characteristic of the automatic gain control loop can beaccelerated rather than the steady operation state to improve thefollow-up performance. After this, the generation period of the controlsignal GC is switched to the generation period T4 [s] of the controlsignal GC in the steady operation state at a lapsed time T6 [s] at whichcompletion of the rise operation of the detected level of the receivedelectric field is assumed.

In other words, in a flowchart shown in FIG. 6, in step S603, thecontrol portion 25 sets the generation period of the control signal GCto T5 [s], which is shorter than that in the steady operation state,from the non-operated state to the lapsed time T6 [s] in the riseperiod. In step S602, after the lapsed time T6 has lapsed, the controlportion 25 sets the generation period of the control signal GC to T4 [s]which must be set in the steady operation state. Then, the trigger ofthe latch timing control signal C1 is generated based on the setgeneration period. In this case, counting of the time is made by thesoftware timer in the microprocessor, and the software timer is reset atthe time when the receiver device enters into the receiving operation.

In this way, because the generation period T5 [s] of the control signalGC of the automatic gain control loop is set shorter than the generationperiod T4 [s] in the steady operation state in the rise period from thenon-operated state to the steady operation state when the receiverdevice carries out its intermittent receiving operation, the follow-upperformance of the automatic gain control loop at the time of the riseoperation and the pull-in of the automatic gain control loop can beimproved.

Operations of the receiver system and the automatic gain control loop inthe automatic gain control circuit according to the second embodimentare similar to those in the above automatic gain control circuitaccording to the first embodiment, and first and second variations canbe similarly applied like the automatic gain control circuit accordingto the first embodiment. In this case, when the first variation(configuration in which the look-up table is employed) is applied, caremust be taken in that, unlike the above automatic gain control circuitaccording to the first embodiment, the timer circuit is reset when theautomatic gain control circuit is shifted from the non-operated state tothe operated state in the intermittent receiving operation.

As described above, according to the automatic gain control circuit ofthe second embodiment, the generation timing or the generation period ofthe control signal GC can be decided in response to the lapsed time inoperation of the automatic gain control circuit or the receiving devicewhich is constructed to comprise the automatic gain control circuit. Inother words, for a predetermined rise period from the non-operated stateto the steady operation state when the receiver device carries out theintermittent receiving operation, the generation period T5 [ ] of thecontrol signal GC can be set shorter than the generation period T4 [s]in the steady operation state so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state, and then such shorter generation period canbe switched to the generation period in the steady operation state afterthe predetermined time T6 [s]. Therefore, even in the case where largevariation in the receiving signal level is expected at the time of theintermittent receiving operation of the receiver device, or the casewhere small variation in the receiving signal level is caused becausethe condition of the electric field is stabilized, the generation timingor the generation period of the control signal for the automatic gaincontrol loop can be optimized and also the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

Third Embodiment

FIG. 7 is a view showing a configuration of an automatic gain controlcircuit according to a third embodiment of the present invention, and anautomatic gain control method according to the present invention isapplied to the automatic gain control circuit.

In FIG. 7, like reference symbols are affixed to the same or similarparts as those in FIG. 1 (first embodiment).

In FIG. 7, the automatic gain control circuit according to the thirdembodiment is constructed to comprises the gain variable amplifier 11,the demodulator portion 12, the A/D converter 13, the level detector 14,the averaging portion 15, the difference-in-converged value calculatingadder 16, the loop gain controlling multiplier 17, the adder 18 in theintegrator circuit portion, the latch circuit 19 in the integratorcircuit portion, the arithmetic portion 20, the D/A converter 21, alatch circuit 22, an adder 23, and a control portion 26.

The gain variable amplifier 11, the demodulator portion 12, and the A/Dconverter 13 construct a receiver system which receives the receivingsignal Ri and then outputs the demodulated output Rd. The level detector14, the averaging portion 15, the difference-in-converged valuecalculating adder 16, the loop gain controlling multiplier 17, the adder18 in the integrator circuit portion, the latch circuit 19 in theintegrator circuit portion, the arithmetic portion 20, and the D/Aconverter 21 construct the automatic gain control loop. In this case,the automatic gain control loop corresponds to a control signalgenerating means set forth in claims. Also, the control portion 26 canbe implemented by a processing means such as a microprocessor, etc., andcorresponds to a controlling means set forth in claims. In addition, thelevel detector 14, the averaging portion 15, the latch circuit 22, andthe adder 23 correspond to a detected output change amount detectingmeans set forth in claims.

Since configurations of the receiver system and the automatic gaincontrol loop according to the third embodiment are the same as those inthe first embodiment, their functional explanation and their operationalexplanation will be omitted. In other words, the circuit configurationof the automatic gain control circuit according to the third embodimentcan be implemented by adding the latch circuit 22 and the adder 23, bothserve as the detected output change amount detecting means together, tothe configuration of the first embodiment (FIG. 1), and is characterizedby an approach for deciding the generation timing or the generationperiod of the control signal GC in the control portion 26.

In FIG. 7, like the first embodiment, the control portion 26 outputs thelatch timing control signal C2 to control the timing at which an outputof the adder 18 in the integrator circuit portion is latched by thelatch circuit 19. The preceding loop gain data in the automatic gaincontrol loop are held in the latch circuit 19, and the result which isobtained by adding an amount of change in the loop gain data by theadder 18 is latched by the trigger of the latch timing control signalC2. Therefore, the latch timing control signal C2 can define thegeneration timing of the control signal GC, and the trigger period ofthe latch timing control signal C2 coincides with the generation periodof the control signal GC.

The automatic gain control circuit according to the third embodiment ischaracterized in that the generation period (generation timing) of thecontrol signal GC can be decided in accordance with an amount of changein the level-detected output of the demodulated output Rd which isdetected by the detected output change amount detecting means (the leveldetector 14, the averaging portion 15, the latch circuit 22, and theadder 23).

A method of deciding the generation period of the control signal GCwhich is characterized as above will be explained with reference to FIG.8 hereunder. FIG. 8 is a view showing the follow-up performance of theautomatic gain control loop of the receiver device. FIG. 8A shows thecase of the automatic gain control circuit according to the thirdembodiment, and FIG. 8B shows the case of the automatic gain controlcircuit in the prior art.

First, in the automatic gain control circuit in the prior art shown inFIG. 8B, since the generation period T7 [s] of the control signal of theautomatic gain control is set to a constant value irrespective of thelevel variation of the automatic gain control loop, the follow-upperformance of the automatic gain control loop against the abruptvariation in the detected level of the received electric field issometimes degraded.

In contrast, in the automatic gain control circuit according to thethird embodiment, as shown in FIG. 8A, since the generation period Tn[s] of the control signal GC can be decided in answer to an amount ofchange the electric field detected level by detecting the electric fielddetected level, it should be understood that the control signal GC canalways be generated at an optimal generation period (generation timing)and thus the follow-up performance of the automatic gain control loopcan be improved rather than the prior art.

Operations of the detected output change amount detecting means (thelatch circuit 22 and the adder 23) and the control portion 26 will beexplained in detail based on the above explanation.

To begin with, in the initial state when the automatic gain controlcircuit starts its operation, latch data in the latch circuit 22 may beset arbitrarily to any value, and also a certain value is output fromthe gain variable amplifier 11 according to the voltage of the controlsignal GC output by the automatic gain control loop. As a result,according to the change in the output signal level after the gain of thegain variable amplifier 11 is changed, outputs of the demodulatorportion 12, the A/D converter 13, the level detector 14, and theaveraging portion 15 are also changed. The preceding data are latched bythe latch circuit 22, and a difference between a changed output of theaveraging portion 15 and the preceding data in the latch circuit 22 iscalculated by the adder 23, and then the result is supplied to thecontrol portion 26 as an amount of change in the detected level. Thecontrol portion 26 sets the optimum generation period of the controlsignal GC in response to an amount of change in the detected level, andthen outputs the trigger of the latch timing control signal C2 to thelatch circuit 19 in the integrator circuit portion based on suchgenerated period.

The integrator circuit portion integrates an amount of change in theloop gain data by updating the data in the latch circuit 19 by thetrigger of the latch timing control signal C2. In addition, the integraldata integrated by the integrator circuit portion are converted intodata which are equivalent to the control voltage for the gain variableamplifier 11 by the arithmetic portion 20. Then, the arithmetic resultis converted into an analogue value by the D/A converter 21, and thenfed back to the gain variable amplifier 11 as the control voltage basedon the data.

Next, as a first variation of the automatic gain control circuitaccording to the third embodiment, a variation in which a numericalvalue translation table (look-up table) is employed in the controlportion 26 will be explained hereunder. In this case, the controlportion 26 is constructed, for example, by incorporating a memory suchas the ROM, etc., in which the numerical value translation table isstored, into the microprocessor. The memory holds the generation periodof the control signal GC in answer to an amount of change in thedetected level. The memory receives an output of the detected outputchange amount detecting means (the adder 23) as the address and thensupplies the generation period of the control signal GC to themicroprocessor. Then, the microprocessor generates the trigger of thelatch timing control signal C2 based on the generation period of thecontrol signal GC. If such numerical value translation table (look-uptable) is employed, update of the generation period data of the controlsignal GC can be conducted simply by exchanging the ROM, etc.

Next, as a second variation of the automatic gain control circuitaccording to the third embodiment, a variation in which the digitalsignal processor (DSP) is employed in the automatic gain control loopwill be explained hereunder. In this case, for example, configurationsof the automatic gain control loop (the level detector 14, the averagingportion 15, the difference-in-converged value calculating adder 16, theloop gain controlling multiplier 17, the adder 18 in the integratorcircuit portion, the latch circuit 19 in the integrator circuit portion,the arithmetic portion 20, and the D/A converter 21), the detectedoutput change amount detecting means (the latch circuit 22 and the adder23), and the control portion 26 can be implemented by the DSP.

Like the first embodiment, the process portions corresponding to theautomatic gain control loop (control signal generating step) areexecuted by the procedures in the flowchart shown in FIG. 4. However, asfor the above timing for adding (integrating) the control data in stepS406 of FIG. 4, an integration timing of the control signal is setseparately by procedures in a flowchart of FIG. 9.

More particularly, FIG. 9 is a flowchart showing a method of deciding anintegration period (integration timing) in the third embodiment, whichcorresponds to the detected output change amount detecting means and thecontrol portion. In step S901, the level detection of the receivedelectric field is carried out. In step S902, the level-detected data aresubjected to the averaging process for a predetermined time. Then, instep S903, an amount of change in the detection data is calculated basedon the difference from the preceding detection data. In step S904, theintegration period (integration timing) of the control data is decidedbased on the calculated amount of change in the detection data. Wherethe steps S901 to S903 correspond to a detected output change amountdetecting step set forth in claims, and the step S904 corresponds to acontrol step set forth in claims.

In this case, the same steps as the steps S402 and S403 in FIG. 4 may beutilized as the steps S901 and S902.

As described above, according to the automatic gain control circuit ofthe third embodiment and the first and second variations of the thirdembodiment, the generation period Tn [s] (or the generation timing) ofthe control signal GC can be decided in response to an amount of changein the detected output of the demodulated output Rd which is detected bythe detected output change amount detecting means (detected outputchange amount detecting step). Therefore, under various situations suchas the case where large variation in the receiving signal level isexpected at the time of the turn-ON operation of the power supply, thecase where small variation in the receiving signal level is causedbecause the condition of the electric field is stabilized, or the like,the generation period (or the generation timing) of the control signalfor the automatic gain control loop can be optimized finely and thefollow-up performance of the automatic gain control loop can beoptimized to thus assure the good receiving characteristic.

Fourth Embodiment

FIG. 10 is a view showing a configuration of an automatic gain controlcircuit according to a fourth embodiment of the present invention, andan automatic gain control method according to the present invention isapplied to the automatic gain control circuit. In FIG. 10, likereference symbols are affixed to the same or similar parts as those inFIG. 1 (first embodiment).

In FIG. 10, the automatic gain control circuit according to the fourthembodiment is constructed to comprises the gain variable amplifier 11,the demodulator portion 12, the A/D converter 13, the level detector 14,the averaging portion 15, the difference-in-converged value calculatingadder 16, the loop gain controlling multiplier 17, the adder 18 in theintegrator circuit portion, the latch circuit 19 in the integratorcircuit portion, the arithmetic portion 20, the D/A converter 21, afading pitch detector portion 24, and a control portion 27.

The gain variable amplifier 11, the demodulator portion 12, and the A/Dconverter 13 construct a receiver system which receives the receivingsignal Ri and then outputs the demodulated output Rd. The level detector14, the averaging portion 15, the difference-in-converged valuecalculating adder 16, the loop gain controlling multiplier 17, the adder18 in the integrator circuit portion, the latch circuit 19 in theintegrator circuit portion, the arithmetic portion 20, and the D/Aconverter 21 construct the automatic gain control loop. In this case,the automatic gain control loop corresponds to a control signalgenerating means set forth in claims. Also, the control portion 27 canbe implemented by the processing means such as the microprocessor, etc.,and corresponds to the controlling means set forth in claims. Inaddition, the fading pitch detector portion 24 corresponds to a meansfor detecting a fading pitch of the receiving signal Ri set forth inclaims.

Since configurations of the receiver system and the automatic gaincontrol loop according to the fourth embodiment are identical to thosein the first embodiment, their functional explanation and theiroperational explanation will be omitted.

In other words, the circuit configuration of the automatic gain controlcircuit according to the fourth embodiment can be implemented by addingthe fading pitch detector portion 24 to the configuration of the firstembodiment (FIG. 1), and is characterized by an approach for decidingthe generation timing or the generation period of the control signal GCin the control portion 27.

In FIG. 10, like the first embodiment, the control portion 27 outputsthe latch timing control signal C3 to control the timing at which anoutput of the adder 18 is latched by the latch circuit 19 in theintegrator circuit portion. The preceding loop gain data in theautomatic gain control loop are held in the latch circuit 19, and theresult which is obtained by adding an amount of change in the loop gaindata by the adder 18 is latched by the trigger of the latch timingcontrol signal C3. Therefore, the latch timing control signal C3 candefine the generation timing of the control signal GC, and the triggerperiod of the latch timing control signal C3 coincides with thegeneration period of the control signal GC.

In accordance with the fading pitch of the receiving signal Ri detectedby the fading pitch detector portion 24, the control portion 27 decidesthe generation period (generation timing) of the control signal GC. Inmore detail, the control portion 27 sets the optimum generation periodof the control signal GC in response to the fading pitch, and thenoutputs the trigger of the latch timing control signal C3 to the latchcircuit 19 in the integrator circuit portion based on such generationperiod.

The integrator circuit portion integrates an amount of change in theloop gain data by updating the data in the latch circuit 19 by thetrigger of the latch timing control signal C3. Further, the integraldata integrated by the integrator circuit portion are converted intodata which are equivalent to the control voltage for the gain variableamplifier 11 by the arithmetic portion 20. Then, the arithmetic resultis converted into an analogue voltage by the D/A converter 21, and thenfed back to the gain variable amplifier 11 as the control voltage basedon the data.

Next, as a first variation of the automatic gain control circuitaccording to the fourth embodiment, a variation in which a numericalvalue translation table (look-up table) is employed in the controlportion 27 will be explained hereunder. In this case, the controlportion 27 is constructed, for example, by incorporating a memory suchas the ROM, etc., in which the numerical value translation table isstored, into the microprocessor. The memory holds the generation periodof the control signal GC in answer to the fading pitch of the receivingsignal Ri. The memory receives an output of the fading pitch detectorportion 24, and then supplies the generation period of the controlsignal GC to the microprocessor. Then, the microprocessor generates thetrigger of the latch timing control signal C3 based on the generationperiod of the control signal GC. If such numerical value translationtable (look-up table) is employed, update of the generation period dataof the control signal GC can be conducted simply by exchanging the ROM,etc.

Next, as a second variation of the automatic gain control circuitaccording to the fourth embodiment, a variation in which the digitalsignal processor (DSP) is employed in the automatic gain control loopwill be explained hereunder. In this case, for example, configurationsof the automatic gain control loop (the level detector 14, the averagingportion 15, the difference-in-converged value calculating adder 16, theloop gain controlling multiplier 17, the adder 18 in an integratorcircuit portion, the latch circuit 19 in an integrator circuit portion,the arithmetic portion 20, and the D/A converter 21), the fading pitchdetector portion 24 and the control portion 27 shown in FIG. 10 can beimplemented by the DSP.

Like the first embodiment, the process portions corresponding to theautomatic gain control loop (control signal generating step) areexecuted by the procedures in the flowchart shown in FIG. 4. However, asfor the above timing for adding (integrating) the control data in stepS406 of FIG. 4, the integration timing of the control signal is setseparately by procedures in a flowchart shown in FIG. 11.

More particularly, FIG. 11 is a flowchart showing a method of decidingthe integration period (integration timing) in the fourth embodiment,which corresponds to the fading pitch detector portion and the controlportion. In step S1101, a fading pitch of the receiving signal Ri isdetected. In step S1102, integration period (integration timing) of thecontrol data is decided based on the detected fading pitch. Where thestep S1001 corresponds to a fading pitch detecting step set forth inclaims, and the step S1002 corresponds to a controlling step set forthin claims.

As described above, according to the automatic gain control circuit ofthe fourth embodiment and the first and second variations of the fourthembodiment, the generation period (or the generation timing) of thecontrol signal can be decided in response to the fading pitch of thereceiving signal Ri which is detected by the fading pitch detectorportion 24 (fading pitch detecting step). Therefore, even in the casewhere large variation in the receiving signal level is expected inreceiving the receiving signal in the fading circumstance, etc., or thecase where small variation in the receiving signal level is causedbecause the condition of the electric field is stabilized, thegeneration period (the generation timing) of the control signal for theautomatic gain control loop can be optimized and the follow-upperformance of the automatic gain control loop can be optimized to thusassure the good receiving characteristic.

Fifth Embodiment

FIG. 12 is a view showing a configuration of a receiver device includingan automatic gain control circuit according to a fifth embodiment of thepresent invention. In the receiver device according to the fifthembodiment, the automatic gain control circuit mentioned in the first,second, third, or fourth embodiment is incorporated as the automaticgain control circuit (AGC).

In FIG. 12, the receiver device according to the fifth embodiment isconstructed to comprise an antenna 101 used for transmitting andreceiving the signal, an antenna duplexer 102, a high frequency bandpassfilter 103, a low noise amplifier 104, a down mixer 105 for executingfrequency conversion from the high frequency band to the intermediatefrequency band, an intermediate frequency bandpass filter 106, theautomatic gain control circuit (AGC) 107, a frequency synthesizer 108, areceiver 109, a key-operated input portion 111 for instructing anoperation of the receiver device, a microphone 112, a transmittercircuit 113, a power supply portion 114, and a control portion 110 forhandling the control of the receiver device.

An operation of the receiver device according to the fifth embodimentwill be explained with reference to FIG. 12 hereunder. First, the signal(for example, the signal in the 2 [GHz] band is assumed herein) isreceived via the antenna 10. The signal input via the antenna 10 is thenpassed through the duplexer 102, and then signal components other thanthe desired frequency band are attenuated by the high frequency bandpassfilter 103. After passed through the bandpass filter 103, the signal isamplified by the low noise amplifier 104, then the frequency of thesignal is converted into the intermediate frequency band (e.g., 380[MHz]) by the down mixer 105, and then the signal is input into theautomatic gain control circuit 107 via the intermediate frequencybandpass filter 106.

The signal input into the automatic gain control circuit 107 isdemodulated by the demodulator circuit 12 provided in the automatic gaincontrol circuit 107, and then output to the control portion 110 as abase band signal to be subjected to the signal processing. In theautomatic gain control loop in the automatic gain control circuit 107,the demodulated output Rd is level-detected by the level detector 14 andthen is subjected subsequently to the signal processing, described inthe first, second, third, or fourth embodiment, whereby the feedbackvoltage (control signal GC) to be supplied to the gain variableamplifier 11 can be generated.

As described above, according to the receiver device of the fourthembodiment, since the automatic gain control circuit (1, 2, or 3)according to the first, second, third or fourth embodiment is employed,the generation period of the control signal GC for the automatic gaincontrol loop can be set in response to the lapsed time from thenon-operated state of the receiving device, an amount of change in thedetected output of the receiving signal, or the fading pitch of thereceiving signal, etc., under various situations such as the case wherelarge variation in a receiving signal level is expected at the time of aturn-ON operation of a power supply, an intermittent receiving operationof a receiver device, a receiving operation in the fading condition, orthe like, or the case where small variation in the receiving signallevel is caused because the electric field condition is stabilized.Therefore, the follow-up performance of the automatic gain control loopcan be optimized and thus the receiving device can execute the receivingoperation as the optimum automatic gain control operation. As a result,the good receiving characteristic can be achieved.

Particularly, if the automatic gain control circuit 1 according to thefirst embodiments employed, the generation period T2 [s] of the controlsignal GC can be set shorter than the generation period T1 [s] in thesteady operation state, for a predetermined rise period from thenon-operated state to the steady operation state when the power supplyof the receiver device is shifted from its OFF state to its ON state(when the power supply is turned ON), so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state, and then such shorter generation period canbe switched to the generation period in the steady operation state afterthe predetermined time T3 [s]. Therefore, the follow-up performance ofthe automatic gain control loop and the pull-in of the automatic gaincontrol loop can be improved. Even in the case where large variation inthe receiving signal level is expected at the time of the turn-ONoperation of the power supply, or the case where small variation in thereceiving signal level is caused because the condition of the electricfield is stabilized, the generation timing or the generation period ofthe control signal for the automatic gain control loop can be optimizedand also the follow-up performance of the automatic gain control loopcan be optimized. As a result, the good receiving characteristic can beachieved.

Particularly, if the automatic gain control circuit 1 according to thesecond embodiments employed, the generation period T5 [s] of the controlsignal GC can be set shorter than the generation period T4 [s] in thesteady operation state, for a predetermined rise period from thenon-operated state to the steady operation state when the receiverdevice carries out the intermittent receiving operation, so as toaccelerate the response characteristic of the automatic gain controlloop rather than that in the steady operation state, and then suchshorter generation period can be switched to the generation period inthe steady operation state after the predetermined time T6 [s].Therefore, the follow-up performance of the automatic gain control loopand the pull-in of the automatic gain control loop can be improved. Evenin the case where large variation in the receiving signal level isexpected at the time of the intermittent receiving operation of thereceiver device, or the case where small variation in the receivingsignal level is caused because the condition of the electric field isstabilized, the generation timing or the generation period of thecontrol signal for the automatic gain control loop can be optimized andalso the follow-up performance of the automatic gain control loop can beoptimized. As a result, the good receiving characteristic can beachieved.

As described above, according to the automatic gain control circuit andthe receiver device with such automatic gain control circuit, theautomatic gain control method in the receiver device, and the recordingmedium of the present invention, when the control signal for the gainvariable amplifier is generated by level-detecting the receiving signaland generating the feedback signal by the control signal generatingmeans (control signal generating step), the generation timing or thegeneration period of the control signal is decided in response to apredetermined physical quantity by the controlling means (controllingstep). Therefore, under various situations such as the case where largevariation in a receiving signal level is expected, the case where smallvariation in the receiving signal level is caused because the electricfield condition is stabilized, or the like, the generation timing or thegeneration period of the control signal for the automatic gain controlloop can be decided by setting the physical quantity to respond tovarious conditions. As a result, the follow-up performance of theautomatic gain control loop can be optimized under various situations,and thus the good receiving characteristic can be achieved.

Also, according to the present invention, the generation timing or thegeneration period of the control signal for the automatic gain controlamplifier can be decided in response to the predetermined physicalquantity by selecting the predetermined physical quantity as addressinformation and then referring to the look-up table in which informationof the generation timing or the generation period of the control signalare held to correspond to the address information. Therefore, undervarious situations such as the case where large variation in thereceiving signal level is expected at the time of the turn-ON operationof the power supply, the intermittent receiving operation of thereceiver device, the receiving operation in the fading condition, or thelike, or the case where small variation in the receiving signal level iscaused because the electric field condition is stabilized, thepredetermined physical quantity can be set finely by referring to thelook-up table upon optimization of the generation timing or thegeneration period of the control signal for the automatic gain controlloop. Hence, the follow-up performance of the automatic gain controlloop can be optimized under various conditions, and thus the goodreceiving characteristic can be achieved. Also, the method of generatingthe generation timing or the generation period of the control signal andalso the data stored in the table can be changed simply by exchangingthe look-up table.

Also, according to the present invention, the generation timing or thegeneration period of the control signal can be decided by thecontrolling means (controlling step) in response to the lapsed time inoperation of the automatic gain control circuit or the receiving devicewhich is constructed to comprise the automatic gain control circuit. Fora predetermined rise period from the non-operated state to the steadyoperation state when the power supply is turned ON, the generationperiod of the control signal can be set shorter than the generationperiod in the steady operation state so as to accelerate the responsecharacteristic of the automatic gain control loop rather than that inthe steady operation state. Therefore, even in the case where largevariation in the receiving signal level is expected at the time of thepower supply ON, the generation timing or the generation period of thecontrol signal for the automatic gain control loop can be optimized andalso the follow-up performance of the automatic gain control loop can beoptimized to thus assure the good receiving characteristic.

Also, according to the present invention, the generation timing or thegeneration period of the control signal can be decided by thecontrolling means (controlling step) in response to the lapsed time inoperation of the automatic gain control circuit or the receiving devicewhich is constructed to comprise the automatic gain control circuit. Fora predetermined rise period from the non-operated state to the steadyoperation state when the receiver device carries out the intermittentreceiving operation, the generation period of the control signal can beset shorter than the generation period in the steady operation state soas to accelerate the response characteristic of the automatic gaincontrol loop rather than that in the steady operation state.

Therefore, even in the case where large variation in the receivingsignal level is expected at the time of the intermittent receivingoperation of the receiver device, the generation timing or thegeneration period of the control signal for the automatic gain controlloop can be optimized and also the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

Also, according to the present invention, the generation timing or thegeneration period of the control signal GC can be decided in response toan amount of change in the detected output of the demodulated outputwhich is detected by the detected output change amount detecting means(detected output change amount detecting step). Therefore, under varioussituations such as the case where large variation in the receivingsignal level is expected, the case where small variation in thereceiving signal level is caused because the condition of the electricfield is stabilized, or the like, the generation timing or thegeneration period of the control signal for the automatic gain controlloop can be optimized finely and the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

Furthermore, according to the present invention, the generation timingor the generation period of the control signal can be decided by thecontrolling means (controlling step) in response to the fading pitch ofthe receiving signal which is detected by the fading pitch detectorportion (fading pitch detecting step). Therefore, even in the case wherelarge variation in the receiving signal level is expected in receivingthe receiving signal in the fading circumstance, etc., or the case wheresmall variation in the receiving signal level is caused because thecondition of the electric field is stabilized, the generation timing orthe generation period of the control signal for the automatic gaincontrol loop can be optimized and the follow-up performance of theautomatic gain control loop can be optimized to thus assure the goodreceiving characteristic.

1. An automatic gain control circuit comprising: a gain variableamplifier which controls an amplitude of a receiving signal based on acontrol signal; control signal generating means for level-detecting thereceiving signal and then generating a feedback signal as the controlsignal for the gain variable amplifier; and controlling means fordeciding at least one of a generation timing of the control signal and ageneration period of the control signal in response to a predeterminedphysical quantity, and controlling the control signal generating means.2. An automatic gain control circuit according to claim 1, furthercomprising: detected output change amount detecting means for detectingan amount of change in a detected output of the receiving signal;wherein the controlling means decides the generation timing of thecontrol signal or the generation period of the control signal using anamount of change in the detected output as the predetermined physicalquantity.
 3. A receiver device comprising: an automatic gain controlcircuit including: a gain variable amplifier which controls an amplitudeof a receiving signal based on a control signal; control signalgenerating means for level-detecting the receiving signal and thengenerating a feedback signal as the control signal for the gain variableamplifier; and controlling means for deciding at least one of ageneration timing of the control signal and a generation period of thecontrol signal in response to a predetermined physical quantity, andcontrolling the control signal generating means.
 4. An automatic gaincontrol method in a receiver device including a gain variable amplifierwhich controls an amplitude of a receiving signal based on a controlsignal, the method comprising: a control signal generating step oflevel-detecting the receiving signal and then generating a feedbacksignal as the control signal for the gain variable amplifier; and acontrolling step of deciding a generation timing of the control signalor a generation period of the control signal in response to apredetermined physical quantity.
 5. An automatic gain control method ina receiver device according to claim 4, further comprising: a detectedoutput change amount detecting step of detecting an amount of change ina detected output of the receiving signal; wherein the controlling stepdecides the generation timing of the control signal or the generationperiod of the control signal using an amount of change in the detectedoutput as the predetermined physical quantity.
 6. A computer-readablerecording medium for recording the automatic gain control method for thereceiver device as a program to be executed by a computer, said methodcomprising: a control signal generating step of level-detecting thereceiving signal and then generating a feedback signal as the controlsignal for the gain variable amplifier; and a controlling step ofdeciding a generation timing of the control signal or a generationperiod of the control signal in response to a predetermined physicalquantity.